A counter is a memory-type device, which counts events, by storing a single natural number. Counters may be associated with a finite-state machine (FSM) which may perform any of the following operations on the counter: check whether the value stored in the counter is zero; increment the counter by one; and decrement the counter by one (if zero already the value on the counter remains unchanged).
In an application specific integrated circuit (ASIC) the number of events associated with a single counter in a time frame of interest to humans (greater than one second) may make it prohibitive to implement the full counter read by humans in the ASIC, if there are a large number of counters. This is because of the cost of resources needed to implement the counters with in the ASIC. This issue is resolved by using a smaller counter and implementing software to poll the counters to update a much larger counter in CPU memory which is less costly.
Reading and updating these counters consumes a noticeable portion of a single CPU bandwidth.
Typically an update action that updates an upper layer software with the current value stored by the counter, is performed at a predetermined timing scheme, and includes a series of steps: 1) the currently stored value of the counter is read by the software; 2) The software refers to the latest value in the memory of the software for that counter; 3) the difference between latest value in the memory of the software and the currently stored value of the counter is calculated; 4) the value stored in the counter is updated; and 5) the value in the memory of the software is updated.